AMD Design Engineer (Verification) interview questions

A chip was given which performs (001)addition,(010) subtraction, (011)multiplication and division(100) on 8 bit value, it can store 20 operands at a time in a stack and 2 bits for error handling, Arth overflow Stack over 1.Questions was to find out end cases and possible errors and how can we handle it in verilog test benches?. 2. Also, How to write those test cases. ?

Given this design and their features, explain how you would build a UVM testbench to verify it.