AMD interview questions

The interview consisted of three rounds, two of which were related to computer architecture and one was coding & DSA. Some of the questions are as follows 1. How to classify a workload as CPU-intensive or memory-intensive? (with and without altering the CPU microarchitecture) 2. Explain branch predictor. What is one major difference between arm and x86 CPU branch predictors? 3. What is the need for architecture simulators? why not simulate workloads in RTL directly? 4. Given a multicore system with a fixed memory architecture, how does single-core performance vary with scheduling identical single-threaded workloads in increasing cores? 5, What are some pipeline hazards? How to overcome them? The coding round consisted of questions about OOPS in C++ and some Leetcode medium-level DSA questions.

What are the challenge you will see in lower technology? What are the inputs and outputs from the power analysis? What are the checks after power planning is completed? What are the power dissipation components? How to reduce them Why float outputs are ignored but not float gates? How do you calculate the core ring width? What is IR drop? And how will you decrease this?