1hr phone interview. Some intro. then mainly on layout experiences. From floorplan, powerplan, placement, CTS, routing, and STA. Explain each stage briefly, what problem did i meet, how to fix them...
I applied through other source. I interviewed at NVIDIA in Dec 2025
Interview
4 stages, 2 technical questions stages followed by an hr stage and another stage which is talking with a high level manager and the pay offer stage
in the first two stages you sit with engineers and get questions based mainly on timings and a bit of verilog
Interview questions [1]
Question 1
i was given a circuit with ff and gates with timing numbers and asked to calculate the tsetup and thold while also improving it and explaining what does it mean exactly
Questions about projects. Physical Design basics, from floorplan to signoff. Setup and hold time. Multi-corner STA. CMOS basics. Given a CMOS circuit gives the operation region each transistor is operating on.
Interview questions [1]
Question 1
Questions about projects. Physical Design basics, from floorplan to signoff. Setup and hold time. Multi-corner STA. CMOS basics. Given a CMOS circuit gives the operation region each transistor is operating on.