What are "Spare Cells" and why it is used? Why do you make clock as Ideal during floorplan & Placement Stage? What are the different Checks we do in the CTS stage? What if Setup is failed after manufacturing of chip? How will you fix Hold? What is the Importance of useful Skew? What are DRV Checks and why do we check that? What is the cross talk? How it will effect the performance? Cross delay or Cross talk noise is note generally. Why? A Blocks having 7 Metal layers and same block having 10 metal layer, which will function better and why? How will you define the shape of the Die?
