detailed test plan for a synchronous fifo
Verification Manager Interview Questions
3,720 verification manager interview questions shared by candidates
Uvm phases and explain them
Strong focus on making sure Veriff and the candidate are on the same page in terms of values, future goals etc. (for example - relation to Veriff's mission)
Basic CMOS Physical design related Sta Tool related
MATLAB functions, DSP related questions;
Introduce yourself and tell us something unique about you.
Which one of Amgen’s values do you align with most? Why would you be a good fit for this role? Tell me about a time when you providing above and beyond customer service expierence?
Tell me about yourself
Tell me about your background What are your aspirations in life? Why would you like to work with such a company? Tell us about an experience where you used your skills in your previous job.
About digital electronics for VLSI domain
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